- output instruction
- команда вывода
English-Russian dictionary of computer science. 2015.
output instruction
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Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
Instruction scheduling — In computer science, instruction scheduling is a compiler optimization used to improve instruction level parallelism, which improves performance on machines with instruction pipelines. Put more simply, without changing the meaning of the code, it … Wikipedia
Instruction cycle — An instruction cycle (sometimes called fetch and execute cycle, fetch decode execute cycle, or FDX) is the basic operation cycle of a computer. It is the process by which a computer retrieves a program instruction from its memory, determines what … Wikipedia
Instruction set simulator — An instruction set simulator (ISS) is a simulation model, usually coded in a high level programming language, which mimics the behavior of a mainframe or microprocessor by reading instructions and maintaining internal variables which represent… … Wikipedia
Instruction step — An instruction step is a method of executing a computer program one step at a time to determine how it is functioning. This might be to determine if the correct program flow is being followed in the program during the execution or to see if… … Wikipedia
Input/output — In computing, input/output, or I/O, refers to the communication between an information processing system (such as a computer), and the outside world – possibly a human, or another information processing system. Inputs are the signals or data… … Wikipedia
Differentiated instruction — (sometimes referred to as differentiated learning) involves providing students with different avenues to acquiring content; to processing, constructing, or making sense of ideas; and to developing teaching materials so that all students within a… … Wikipedia
Tensilica Instruction Extension — Tensilica Instruciton Extension refers to the language that is used to extend the Xtensa processor core instruction set. TIE in its syntax, is closer to the Hardware description language Verilog. TIE allows the user to extend the functionality… … Wikipedia
Jeu D'instruction X86 — Article détaillé : Jeu d instructions. Le jeu d instructions du x86 a subi de nombreux changements au cours du temps. La plupart d entre eux ne sont que des ajouts au jeu d instruction initial afin d apporter de nouvelles fonctionnalités.… … Wikipédia en Français
Jeu d'instruction x86 — Article détaillé : Jeu d instructions. Le jeu d instructions du x86 a subi de nombreux changements au cours du temps. La plupart d entre eux ne sont que des ajouts au jeu d instruction initial afin d apporter de nouvelles fonctionnalités.… … Wikipédia en Français
INT (x86 instruction) — INT is an assembly language instruction for x86 processors for generating a software interrupt. It takes one argument that must be a constant byte value. [cite web |url=http://developer.intel.com/design/pentiumii/manuals/243191.htm|title=Intel… … Wikipedia
